1. Field of the Invention
The present invention relates to a flying capacitor type voltage detecting circuit and a battery protection integrated circuit, particularly to a technology that is capable of reducing parasitic capacitance.
2. Description of the Related Art
FIG. 1 is a related art circuit diagram of a flying capacitor type voltage detecting circuit. This voltage detecting circuit is configured to detect a voltage (a cell voltage) of each of electric cells that constitute an assembled battery.
In order to detect a voltage of, for example, a battery B0, a flying capacitor CI is first electrically charged by turning on input sampling switches SW6, SW7. Next, when the input sampling switches SW6, SW7 are turned off and output sampling switches SW14, SW19 are turned on, electric charge of the flying capacitor CI is transferred to an integral capacitor CF. With this, a converted voltage VOUT(0), which corresponds to the voltage of the battery B0, appears at an output terminal of an operational amplifier A1 as a detected voltage of the battery B0.
In order to detect a voltage of, for example, a battery B1, the flying capacitor CI is first electrically charged by turning on input sampling switches SW7, SW8. In this case, the flying capacitor is charged with a voltage whose polarity is opposite to that of the voltage charged when the voltage of the battery B0 is detected. Next, when the input sampling switches SW7, SW8 are turned off and output sampling switches SW18, SW15 are turned on, electric charge of the flying capacitor CI is transferred to the integral capacitor CF. With this, a converted voltage VOUT(1), which corresponds to the voltage of the battery B1, appears at the output terminal of the operational amplifier A1 as a detected voltage of the battery B1.
Incidentally, a voltage detecting circuit that is capable of detecting a voltage of each of electric cells that constitute an assembled battery is disclosed, for example, in Japanese Patent Application Laid-Open Publication No. 2009-150867 and Published Japanese translations of PCT International Publication for Patent Applications No. 2008-538408.
When a flying capacitor type voltage detecting circuit is integrated into an integrated circuit (IC), a parasitic capacitance within the IC is too large to be neglected compared to an electric capacitance of the flying capacitor, which adversely affects accuracy of a detected voltage.
With reference to FIG. 1, influence of the parasitic capacitance inside the IC on accuracy of the converted voltage VOUT(1) is estimated. Assuming that an electric potential at a node TN is VN, and capacitances of the flying capacitor CI and the integral capacitor CF are equal to C, a parasitic capacitance CD3+CN3 at a node N3 and a parasitic capacitance CD4+CN4 are equal to CD+CN, the following equations are obtained.VN+1−VN=VBAT  (1)CI=CF=C, and  (2)CD3+CN3=CD4+CN4=CD+CN  (3)
where VBAT is a voltage of the electric cell BN, and N is an integer (>0).
In the voltage detection circuit shown in FIG. 1, one of the parasitic capacitance CD3+CN3 and the parasitic capacitance CD4+CN4 is discharged to a reference terminal VGND by the switch SW14 or SW18 when the electric charge of the flying capacitor CI is transferred to the integral capacitor CF. Therefore, the remaining one of the parasitic capacitance CD3+CN3 and the parasitic capacitance CD4+CN4 affects the integral capacitor CF.
On the other hand, the converted voltage VOUT(N) corresponding to a voltage of the electric cell BN is expressed in the following.VOUT(N)=[CI×(VN+1−VN)+(CD+CN)×VN]/CF  (4)
With this expression, the converted voltage VOUT(4), which may include the largest error, is expressed as follows.VOUT(4)=[CI×(V5−V4)+(CD4+CN4)×V4]/CF  (5)
Because V5−V4=VBAT, V4=4×VBAT, and CD4+CN4=CD+CN, the VOUT(4) is obtained as follows.
                                                                        VOUT                ⁡                                  (                  4                  )                                            =                            ⁢                                                [                                                            CI                      ×                      VBAT                                        +                                                                  (                                                  CD                          +                          CN                                                )                                            ×                      4                      ×                      VBAT                                                        ]                                /                CF                                                                                        =                            ⁢                                                VBAT                  ×                                      CI                    /                    CF                                                  +                                  4                  ×                  VBAT                  ×                                                            (                                              CD                        +                        CN                                            )                                        /                    CF                                                                                                          (        6        )            
In addition, because CI/CF=1, the converted voltage VOUT(4) becomesVOUT(4)=VBAT+4×VBAT×(CD+CN)/CF  (7)
Moreover, because the error associated with the voltage conversion is expressed as VOUT(4)−VBAT, the error is expressed as follows.VOUT(4)−VBAT=4×VBAT×(CD+CN)/CF  (8)
In order to reduce the error expressed by the equation (8) to 50 mV or less, the following relationship needs to be satisfied.4×VBAT×(CD+CN)/CF≦50×10−3  (9)
Assuming that VBAT is 4.2 V and CF is 10×10−12 F,(CD+CN)≦29.8×10−15  (10)
However, when the flying capacitor CI composed of an upper electrode and a lower electrode is formed in the IC substrate, and it is assumed that a distance between the lower electrode and the IC substrate is 20 times greater than a distance between the upper electrode and the lower electrode, the parasitic capacitance between the lower electrode and the IC substrate becomes about 0.5 pF (500 fF), which corresponds to one twentieth of the capacitance of the flying capacitor CI. Namely, the parasitic capacitance (500 fF) between the lower electrode and the IC substrate is far greater than the above permissible capacitance of 30 fF.
From the foregoing, it is difficult to integrate the flying capacitor into the IC substrate, because the flying capacitor type voltage detecting circuit has a relatively large parasitic capacitance.
The present invention has been made in view of the above, and provides a flying capacitor type voltage detecting circuit and a battery protection integrated circuit that are capable of reducing an influence of parasitic capacitance thereby enabling integration of a flying capacitor in an IC.